The Adecco Group in Mexico is seeking an experienced analog/mixed-signal IC layout engineer to design, floorplan, and route layouts for high-volume production silicon. You will collaborate with circuit designers through tape-out in a hybrid onsite setup.
Requirements include 3+ years in analog/mixed-signal IC layout, Cadence Virtuoso, and strong English. Familiarity with Calibre/PVS and submicron process effects is preferred; join a supportive team with growth opportunities.
📌 Hybrid Analog IC Layout Engineer: Tape-out Focus (Centro)
🏢 The Adecco Group
📍 Centro
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