Micron Technology, Inc. in Guadalajara, Mexico, is seeking a Layout Design Engineer to contribute to the High Bandwidth Memory (HBM) team.
You will design analog/mixed-signal blocks and lead layout planning for multi-project environments, collaborating with general teams to meet schedules and quality targets. The ideal candidate has 5+ years in analog/custom layout, experience with CMOS processes, and proficiency in Cadence VLE/VXL and Calibre DRC/LVS.
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📌 Senior HBM Layout Engineer for AI & HPC Projects (Jalisco)
🏢 Sin nombre
📍 Jalisco
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