ASIC/Layout Design Engineer 1Position Summary: The ASIC/Layout Design Engineer 1 position is responsible for performing basic physical design and layout activities within our semiconductor company.
This position supports ASIC layout development, assists with physical verification, and helps implement design components.
The role requires fundamental understanding of semiconductor layout principles, technical skills, and attention to detail to support the development of integrated circuit physical designs in the complex semiconductor environment.Key ResponsibilitiesLayout Design Support (30%)Support physical layout of standard cells, memory blocks, and basic circuit elementsAssist with implementation of layout designs based on schematics and specificationsHelp with placement and routing of components and interconnectsSupport floorplanning and power distribution network developmentMaintain layout documentation and design filesPhysical Verification Support (25%)Assist with design rule checking (DRC) and layout vs. schematic (LVS) verificationSupport resolution of basic physical verification issuesHelp with design rule violations identification and correctionParticipate in verification run setup and executionDocument verification results and issue resolutionsLayout Data Preparation (15%)Support preparation of layout data for manufacturingAssist with design for manufacturing (DFM)



checks and optimizationsHelp with mask data preparation and file generationSupport tape-out activities and data transferMaintain design databases and version controlDesign Tool Support (10%)Support physical design tools and EDA environmentsAssist with design kit implementation and updatesHelp maintain layout libraries and technology filesSupport design flow execution and automationAssist with tool setup and configurationTechnology Migration Support (10%)Assist with layout migration between technology nodesSupport porting of designs to new process technologiesHelp implement technology-specific design rules and constraintsParticipate in migration verification and validationDocument process differences and layout adjustmentsTechnical Learning and Development (10%)Develop understanding of physical design principles and methodologiesLearn semiconductor manufacturing processes and design rulesSupport implementation of layout best practicesParticipate in technical training and development activitiesIncrease knowledge of semiconductor technologies and physical design approachesEducation And ExperienceBachelor's degree in Electrical Engineering, Computer Engineering, or related technical field0-2 years of experience in ASIC layout, physical design,



or related roleBasic knowledge of semiconductor design and layout principlesExperience with EDA tools and design environmentsFamiliarity with IC layout verification preferredQualificationsBasic knowledge of ASIC physical design principles and layout methodologiesTechnical understanding of semiconductor manufacturing processes and design rulesProficiency with physical design tools, verification software, and layout environmentsAttention to detail and accuracy in layout implementationGood organizational and time management skillsEffective written and verbal technical communication abilitiesBasic problem-solving capabilitiesUnderstanding of schematic-to-layout correspondence and verificationAbility to read and interpret design specifications and technical documentationWillingness to learn and develop physical design expertiseBasic understanding of semiconductor devices and circuit operation a plusTravel RequirementsMinimal travel required (less than 5% of time)May require occasional travel between company facilitiesLevel Of AuthorityPerforms routine physical design tasks following established proceduresMakes basic decisions regarding layout implementation and verificationEscalates technical issues and design challenges to appropriate personnelWorks under supervision with limited independent decision-makingFollows established policies and procedures for physical design activitiesJob ComplexityPerforms routine physical design activities with clear guidelines and proceduresSupports established layouts with defined parameters and specificationsWorks with standard layout components and structuresRequires understanding of basic physical design concepts and semiconductor principlesExpected to maintain accuracy while implementing layouts and running verificationsWorks with various engineering stakeholders on design projectsLearns to identify layout issues and elevate accordingly#J-*****-Ljbffr

📌 Associate Engineer, Physical Design (Aguascalientes)
🏢 Semtech
📍 Aguascalientes