Ciena is seeking an Analog Layout Engineer in Mexico to contribute to high-speed analog circuit layouts using deep-submicron CMOS technologies, including FinFETs. You will collaborate with senior designers to plan, place, route, and verify layouts, ensuring device performance and layout quality.
Responsibilities include evaluating layout feasibility, performing verification checks, and driving productivity with tool features while working with cross-functional teams.
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📌 Senior Analog/Mixed-Signal Layout Engineer (Ciudad de México)
🏢 Ciena
📍 Ciudad de México
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