Associate Engineer, Physical Design (Centro-Norte)

Associate Engineer, Physical Design (Centro-Norte)

30 oct
|
Semtech
|
Centro-Norte

30 oct

Semtech

Centro-Norte

ASIC/Layout Design Engineer 1
Position Summary: The ASIC/Layout Design Engineer 1 position is responsible for performing basic physical design and layout activities within our semiconductor company. This position supports ASIC layout development, assists with physical verification, and helps implement design components. The role requires fundamental understanding of semiconductor layout principles, technical skills, and attention to detail to support the development of integrated circuit physical designs in the complex semiconductor environment.

Key Responsibilities
Layout Design Support (30%)

Support physical layout of standard cells, memory blocks, and basic circuit elements

Assist with implementation of layout designs based on schematics and specifications

Help with placement and routing of components and interconnects

Support floorplanning and power distribution network development

Maintain layout documentation and design files

Physical Verification Support (25%)

Assist with design rule checking (DRC) and layout vs. schematic (LVS) verification

Support resolution of basic physical verification issues

Help with design rule violations identification and correction

Participate in verification run setup and execution

Document verification results and issue resolutions

Layout Data Preparation (15%)

Support preparation of layout data for manufacturing

Assist with design for manufacturing (DFM) checks and optimizations

Help with mask data preparation and file generation

Support tape-out activities and data transfer

Maintain design databases and version control

Design Tool Support (10%)

Support physical design tools and EDA environments

Assist with design kit implementation and updates





Help maintain layout libraries and technology files

Support design flow execution and automation

Assist with tool setup and configuration

Technology Migration Support (10%)

Assist with layout migration between technology nodes

Support porting of designs to new process technologies

Help implement technology-specific design rules and constraints

Participate in migration verification and validation

Document process differences and layout adjustments

Technical Learning and Development (10%)

Develop understanding of physical design principles and methodologies

Learn semiconductor manufacturing processes and design rules

Support implementation of layout best practices

Participate in technical training and development activities

Increase knowledge of semiconductor technologies and physical design approaches

Education And Experience

Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field

0-2 years of experience in ASIC layout, physical design, or related role

Basic knowledge of semiconductor design and layout principles

Experience with EDA tools and design environments

Familiarity with IC layout verification preferred

Qualifications

Basic knowledge of ASIC physical design principles and layout methodologies

Technical understanding of semiconductor manufacturing processes and design rules





Proficiency with physical design tools, verification software, and layout environments

Attention to detail and accuracy in layout implementation

Good organizational and time management skills

Effective written and verbal technical communication abilities

Basic problem-solving capabilities

Understanding of schematic-to-layout correspondence and verification

Ability to read and interpret design specifications and technical documentation

Willingness to learn and develop physical design expertise

Basic understanding of semiconductor devices and circuit operation a plus

Travel Requirements

Minimal travel required (less than 5% of time)

May require occasional travel between company facilities

Level Of Authority

Performs routine physical design tasks following established procedures

Makes basic decisions regarding layout implementation and verification

Escalates technical issues and design challenges to appropriate personnel

Works under supervision with limited independent decision-making

Follows established policies and procedures for physical design activities

Job Complexity

Performs routine physical design activities with clear guidelines and procedures

Supports established layouts with defined parameters and specifications

Works with standard layout components and structures

Requires understanding of basic physical design concepts and semiconductor principles

Expected to maintain accuracy while implementing layouts and running verifications

Works with various engineering stakeholders on design projects

Learns to identify layout issues and elevate accordingly

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📌 Associate Engineer, Physical Design (Centro-Norte)
🏢 Semtech
📍 Centro-Norte

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