Low Power ASIC Design & Methodology Engineer (Tijuana)

Low Power ASIC Design & Methodology Engineer (Tijuana)

29 oct
|
QUALCOMM
|
Tijuana

29 oct

QUALCOMM

Tijuana

Qualcomm in Baja California is seeking an ASIC Engineer who will define, model, design (digital and/or analog), optimize, verify, implement, and document IP blocks for high-performance, low-power products. You will collaborate with cross-functional groups to determine IP execution paths and support IP integration into SoCs.

Responsibilities include RTL design, simulation, synthesis, timing, lint, clock domain checks, formal verification, and low-power methodology development.

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📌 Low Power ASIC Design & Methodology Engineer (Tijuana)
🏢 QUALCOMM
📍 Tijuana

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