Company: Engineering Group, Engineering Group ASICS Engineering General Summary: Qualcomm's System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre
- and post-silicon phases. This role focuses on content quality and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains. Data center Qualcomm's SoC Validation Team (SVE – System Validation & Emulation) is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The validation team works closely with architects, designers, verification engineers, software engineers, and customers to solve the toughest issues spanning board design, SoC RTL, microcontroller firmware, OS/SW, and process variation. We are currently seeking candidates for the position of SVE Framework and QA Developer Engineer up to Staff level title. In this position you will be porting existing and developing new features for the SVE bare metal framework and infrastructure enabling global teams to effectively validate various Qualcomm HW products. You will oversee and own the QA process planning and execution with various integration, release and debug responsibilities to ensure that SVE teams are enabled with the latest validation environment. If you are passionate about resolving tough technical problems, working with various integral teams,



and intrigued in constantly learning new technologies and applying them efficiently to your work, we're looking for a candidate just like you Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-RTOS environments for various SoC validation activities by global core teams Through a standardized QA process, establish regular SVE test infra release cadence for both internal and external consumption, actively participate in the framework and content debugs to ensure project milestones are met Work together with various core teams on integrating available SVE drivers and content to achieve common QA goals on release quality, stability and intent Design and develop automated QA tools and new flows to ensure the build quality metrics are consistently met in day-to-day activities Develop/port/enhance system validation content based e.g. on system level and low power use cases, find HW bugs and root cause them Interface with various IP validation and cross functional teams (Design/DV/SW) to understand and debug complex issues, and to enable the SVE test infrastructure on Emulation and Post-Si environments Good knowledge and understanding of Embedded SW architecture and content development in C/C++ for validation purposes Ability to use lab equipment for testing and validation, including logic analyzers and oscilloscopes Code Reviews: ability to conduct thorough and constructive code reviews to maintain code quality,



ensure best practices and identify areas of improvement In-depth understanding of software build toolchains comprising of compilers, Makefiles, linker/scatter files Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies, locking mechanism, Virtual memory, MMU, etc. Understanding of mobile chip and/or server architecture (CPU, GPU, DDR, NOCs, Peripherals, etc.), Exposure to build automation tools such as Jenkins, and experience in creating automated processes to streamline the development process Regression testing exposure: understanding the available methodologies and tools, ability to design, implement and execute comprehensive test suites for SW quality and stability Bachelor's/Master's degree in Computer and/or Electrical Engineering or related field Proficiency with C/C++ coding, and at least familiarity with assembly, VHDL/Verilog and various scripting languages like Python or Perl Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

📌 Sve Validation Framework And Qa Engineer (Tijuana)
🏢 QUALCOMM
📍 Tijuana