DRAM Layout Engineer – Advanced CMOS & IP Design (Centro)

DRAM Layout Engineer – Advanced CMOS & IP Design (Centro)

26 oct
|
Micron Technology
|
Centro

26 oct

Micron Technology

Centro

Micron Technology, Inc. in Mexico seeks a Layout Engineer for DRAM design to translate schematics into physical layouts used to generate fabrication reticles.
You will apply digital and analog layout techniques while partnering with design, CAD, and engineering teams to meet product, process, quality, and schedule requirements. You will build expertise in advanced semiconductor processes, verification, mask generation, and tapeout while helping us innovate and improve layout methodologies.

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📌 DRAM Layout Engineer – Advanced CMOS & IP Design (Centro)
🏢 Micron Technology
📍 Centro

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