Ddr Validation Engineer (Tijuana)

Ddr Validation Engineer (Tijuana)

26 oct
|
QUALCOMM
|
Tijuana

26 oct

QUALCOMM

Tijuana

Company Engineering Group, Engineering Group ASICS Engineering General Summary Qualcomm's System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases. This team focuses on content quality and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains.

Data center Seeking an experienced DDR Validation Engineer for end-to-end validation of next-generation LPDDR5X and LPDDR6 memory subsystems on AI Accelerator and Flagship mobile platforms. This role will lead memory bring-up, performance validation, system stress, debug, and production readiness from pre-silicon through post-silicon phases. Drive LPDDR5X/LPDDR6 bring-up, training validation, frequency scaling, low-power state validation, and feature enablement.

Develop and execute validation plans covering memory functionality, performance, reliability, power, and corner-case scenarios. Validate interactions between DDR, CPU, GPU, NPU, cache hierarchy, NoC,



and system software. BS/MS/PhD in EE, CE, CS, or related field.

Memory training and calibration algorithms Proficiency in C/C++ and low-level software development.

Mobile

SoC, AI compute, automotive, or server platform validation experience. Familiarity with SI/PI analysis, memory performance tuning, and thermal characterization.

Experience driving first-silicon memory bring-up and volume production qualification. Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

📌 Ddr Validation Engineer (Tijuana)
🏢 QUALCOMM
📍 Tijuana

Postulate a este anuncio

Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: ddr validation engineer (tijuana) / tijuana

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: ddr validation engineer (tijuana) / tijuana