Dram Ip Layout Engineer — Global Team Lead (México)

Dram Ip Layout Engineer — Global Team Lead (México)

26 oct
|
Micron Technology
|
México

26 oct

Micron Technology

México

Micron Technology, Inc is looking for a DRAM Design Technology Layout Engineer in Tlaquepaque, Jalisco.
You will design and develop IP layouts for DRAM chips, ensuring engineering and process-related criteria are adhered to, while collaborating globally to ensure project success.
Idóneo candidates will have a Bachelor's degree in Electrical Engineering or similar, with at least 3 years of layout design experience, and expertise in Cadence tools.
The position offers comprehensive benefits including medical and paid time off.
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📌 Dram Ip Layout Engineer — Global Team Lead (México)
🏢 Micron Technology
📍 México

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