QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA seeks engineers to implement and verify advanced DFT/DFD techniques for low-power, multi-voltage ASIC designs. You will contribute to reducing test costs, increasing product quality, and improving yield learning on cutting-edge process tech.
The role focuses on DFT pattern generation, coverage analysis, and debugging, plus running and debugging gate-level simulations. Prior DFT experience with scan and MBIST is valued.