Micron Technology, Inc. in Guadalajara, Mexico, is seeking a Layout Design Engineer to craft IC layouts for leaf and standard cells and sub-blocks, optimizing performance, power, and area for High Bandwidth Memory projects.You will interpret DRC/LVS results, collaborate with general teams, and apply a meticulous approach to verification. Recent graduates with related degrees and strong English are encouraged to apply.#J-18808-Ljbffr