Company:

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About Qualcomm
Qualcomm is a integral technology leader driving innovation in wireless communications, AI, computing and connected systems. Our engineering teams develop industry-leading silicon, software, FPGA prototyping platforms, emulation systems and validation solutions that enable the next generation of mobile, automotive, AI and edge computing products. The Tijuana design center is a growing part of that engineering footprint, working shoulder to shoulder with teams in San Diego and across our global sites on the same leading-edge SoC programs.

Role Summary

We are looking for a senior technical leader to establish and grow SoC Systems Validation Engineering at our Tijuana site. This is a hands-on leadership role at the Senior Staff or Principal level: you will set the technical direction for system validation content, own delivery commitments for the silicon programs the site supports, and build a local team of validation and debug engineers from an initial core group into a self-sufficient organization. The scope spans the full silicon lifecycle. On the pre-silicon side, you will drive validation readiness on simulation, emulation and FPGA prototyping platforms. On the post-silicon side, you will lead bring-up, system-level validation, failure analysis and silicon debug in the lab, along with power, performance and concurrency characterization across CPU, DDR, NoC and peripheral subsystems. You will also own the infrastructure behind that work: test content frameworks, automation, CI/CD pipelines, lab enablement and the analysis tooling that turns raw failures into root cause.





Because the team is being built, the role carries an unusual mix of technical depth and organizational work. You will interview and hire, mentor engineers at every level, define the local skills ramp, partner with university and industry recruiting channels in the region, and represent the Tijuana team in program reviews with architecture, design, firmware and software counterparts in other sites. Success is measured as much by the capability the site holds a year from now as by the silicon shipped this quarter.

Key Responsibilities

- Own the system validation strategy for the SoC programs supported from Tijuana, from validation planning and coverage definition through sign-off criteria and exit reviews.
- Set the technical bar for test content, debug methodology and automation, and personally lead the hardest debug efforts rather than delegating them.
- Drive hardware and software co-debug across SoC architecture, firmware, drivers, kernel and hardware interfaces, taking issues to root cause and to a verified fix.
- Review and approve architecture and design decisions from a validation standpoint, including debug hooks, observability, trace infrastructure and bring-up sequencing.
- Apply AI-assisted workflows and automation to triage, failure clustering and regression analysis so that engineering effort concentrates on genuinely new failures.





Program execution and delivery

- Commit to and deliver the site's validation milestones: pre-silicon readiness, tape-out support, first-silicon bring-up, characterization windows and production release gates.
- Plan capacity and staffing against the program roadmap and negotiate scope with partner sites when demand exceeds the team's bandwidth.
- Establish and run the site's lab operations for validation: equipment planning, board and platform inventory, remote lab access, and safe, efficient shift coverage during bring-up.
- Report status, risks and quality metrics to program and engineering leadership with enough specificity that decisions can be made from them.

Team building and people leadership

- Recruit, interview and hire validation, debug and infrastructure engineers for the Tijuana team, from new graduates through senior staff.
- Define and run the onboarding and technical ramp for new engineers so that a new hire reaches independent debug capability on a defined timeline rather than by osmosis.
- Mentor engineers on silicon debug, low-level software and system architecture, and grow the next layer of technical leads within the site.
- Set clear goals and expectations, give direct and regular feedback, and support career growth and retention in a competitive regional talent market.
- Build the site's engineering culture: documentation, design and code review discipline, post-mortems on escapes, and knowledge sharing across shifts and sites.

Cross-site and cross-functional collaboration

- Act as the single technical point of contact for the Tijuana SVE team with architecture, design, verification, firmware, software, emulation and

📌 Manager, SoC Systems Validation Engineering (Tijuana)
🏢 QUALCOMM
📍 Tijuana