Tech Ip Library Characterization Engineer Tijuana, Baja California, Mexico Asics Engineering (México)

Tech Ip Library Characterization Engineer Tijuana, Baja California, Mexico Asics Engineering (México)

17 oct
|
QUALCOMM
|
México

17 oct

QUALCOMM

México

Tech IP Library Characterization EngineerTijuana, Baja California, MexicoApply NowFind out how well you match with this jobJob ID: *## Company:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA## Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:We are looking for talented and ambitious individuals to join the TECHIP team.
The candidate should have strong IP modeling, Char tool know-how and hands-on experience and automation skills.
Hands-on experience in EDA tool automation, data analysis and visualization & large-scale software automation enablement.
Excellent understanding of statistical Liberty timing, power model and Front-end Verilog views and tools.
Silicon reliability modeling, validation with multiple foundries & EDA house is a plus.
Required for this Role:* Strong Std cell / Memory circuit knowledge & IP characterization, Design Kit delivery background.




* Strong logical and problem-solving skills with excellent analytical and debugging skills* Strong Software programming skills in Python or Perl in UNIX/Linux computing platform* Highly motivated, excellent team spirit and good communication skills.
* Ability to work in multi-site project teams, third party vendors to drive cutting edge tools, flows in QCOM environment for characterization flow and sign-off methodologiesPreferred Qualifications:* In depth technical knowledge of CMOS, FinFET logic and transistor, basic of digital circuit design optimization* Familiar with industry standard Design kit (DK) views, Liberty formats for foundation IPs (advanced modeling formats CCS, LVF) , statistical variation models & worked on development of the same.
* Familiarity with front end pre-silicon design flow, RTL design/coding, logic design, Verilog/ System Verilog, RTL design verification, System Verilog Assertion (SVA), Design for Test, BIST modeling experience.
* Expertise in scripting in Python (data-analytics), Perl & experience in developing large scale automation

📌 Tech Ip Library Characterization Engineer Tijuana, Baja California, Mexico Asics Engineering (México)
🏢 QUALCOMM
📍 México

Postulate a este anuncio

Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: tech ip library characterization engineer tijuana, baja california, mexico asics engineering (méxico) / méxico

Suscribete a esta alerta:

Recibe por email las nuevas ofertas de trabajo para: tech ip library characterization engineer tijuana, baja california, mexico asics engineering (méxico) / méxico