Micron Technology, Inc. in Mexico is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout for fabrication reticules and to meet engineering criteria for DRAM products.
You will collaborate with design, CAD and general engineering teams to develop IP layouts, perform physical verification (DRC/LVS/EM), and guide colleagues through layout reviews, while planning strategies and communicating results to stakeholders worldwide.
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📌 Senior DRAM Layout Design Engineer | IP Layout & Tape-out (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque
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