QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA is seeking a design-focused engineer to develop block-level layouts of advanced node analog IPs for smartphones and wireless devices. You will apply layout principles and use Cadence VXL and Calibre for verification.
Maintain layout databases, engage with the design team to understand constraints, track milestones, report status, and collaborate with international mask layout designers in multiple GEOs.