Micron Technology is seeking a Layout Design Engineering Intern to contribute to the development and verification of IP layout cells used in memory products. You will learn floorplanning, placement, routing, and physical verification alongside seasoned layout engineers.
You will also help develop automation solutions to boost productivity and design quality using scripting and AI-assisted development.
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📌 DRAM IP Layout Intern — Automation & Verification (Xalisco)
🏢 Micron
📍 Xalisco
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