Senior Principal Engineer, Memory Layout & Tapeout (Xalisco)

Senior Principal Engineer, Memory Layout & Tapeout (Xalisco)

07 oct
|
Micron
|
Xalisco

07 oct

Micron

Xalisco

Micron Technology seeks a Lead Principal Engineer, Layout Design to lead the physical realization of memory products. You will interpret device specs, develop hierarchical layouts, and optimize die size, timing, and power while coordinating with cross-functional teams to meet tapeout milestones.

Expect to drive verification, ECOs, and documentation, with a focus on reliability and manufacturability in a fast-paced memory technology environment.

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📌 Senior Principal Engineer, Memory Layout & Tapeout (Xalisco)
🏢 Micron
📍 Xalisco

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