03 oct
|
Cadence Design Systems
|
Centro
03 oct
Cadence Design Systems
Centro
Cadence Design Systems seeks a Senior Test Engineer to join a high-energy team ensuring reliable performance of advanced silicon designs. The role focuses on modular hardware diagnostics, test automation across Linux workstations, and cross-functional collaboration with contract manufacturers.
Strong Python, board schematics reading, and ASIC/FPGA experience are required. The position reports to the Director of Test Engineering, with location primarily Guadalajara, Mexico, Cadence offices, or
📌 Senior Test Engineer — Hardware Automation (Centro)
🏢 Cadence Design Systems
📍 Centro