DRAM IP Layout Intern: AI-Driven Automation & Verification (Centro)

DRAM IP Layout Intern: AI-Driven Automation & Verification (Centro)

03 oct
|
Micron Technology
|
Centro

03 oct

Micron Technology

Centro

Micron Technology, Inc. invites applications for a Layout Design Engineering Intern. You will contribute to the development and verification of IP layout cells used in memory products, working with experienced layout engineers on floorplanning, placement, routing, and physical verification.
You will also develop automation solutions with scripting and AI-supported development to improve engineering productivity, design quality, and efficiency, while documenting findings and lessons learned.

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📌 DRAM IP Layout Intern: AI-Driven Automation & Verification (Centro)
🏢 Micron Technology
📍 Centro

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