Design Layout Engineer (Jalisco)

Design Layout Engineer (Jalisco)

03 oct
|
Micron
|
Jalisco

03 oct

Micron

Jalisco

Design Layout Engineer
Empresa : Micron Inc Tipo de empleo : Jornada completa Mexico

Descripción del trabajo - Design Layout Engineer
Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Join the forefront of innovation at Micron Technology, where we redefine possibilities with modern memory and semiconductor solutions. As a Senior Layout Engineer on our DDR Team in Guadalajara, Mexico, you will play a pivotal role in developing technologies that transform information into intelligence.

Responsibilities
- Build and develop critical analog, mixed-signal, and custom digital blocks, along with full chip-level integration support.
- Perform layout verification, including LVS/DRC/Antenna checks, quality control, and documentation.
- Ensure the timely delivery of high-quality block-level layouts.
- Lead planning, area/time estimation,



scheduling, delegation, and execution to meet project achievements.
- Mentor less experienced team members in sub-block-level layout execution and review their work.
- Communicate effectively with global engineering teams to ensure project success.

Minimum Qualifications
- 8+ years of experience in analog/custom layout build in advanced CMOS processes (Planar, FinFET).
- BE or MTech in Electronic/VLSI Engineering or a related field.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
- Hands-on experience in crafting layouts for critical blocks such as Temperature Sensors, PLLs, ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, and Differential Amplifiers.
- Knowledge of analog layout fundamentals, including matching, electromigration, latch-up, coupling, crosstalk, IR-drop, and parasitic devices.
- Understanding of layout effects on c

📌 Design Layout Engineer (Jalisco)
🏢 Micron
📍 Jalisco

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