Pre-silicon fpga platform engineer — emulation & rtl (Guadalajara)

Pre-silicon fpga platform engineer — emulation & rtl (Guadalajara)

22 sep
|
Intel..
|
Guadalajara

22 sep

Intel..

Guadalajara

AI/ML Platform Engineer Description - We are a dynamic centralized platform team dedicated to harnessing cutting‑edge AI/ML technology, particularly in the realm of Generative AI and large language models, to empower HP and drive innovation. Collaborating closely with various business units, we provide strategic advice, prototype solutions, and develop and manage software applications tailored for internal use. Days split roughly evenly between hands‑on building and collaboration/enablement, driven by a mix of roadmap work and incoming requests. Expect to shift context often. Building (largest share of the day) Internal platform tools and services: self‑service portals/workbenches, backend APIs (Python/Fast API), automations and CI/CD tooling MCP/gateway integrations and AI‑enabled automations and flows Focus is always on reducing friction for teams adopting the platform Cloud infrastructure & troubleshooting (weekly) Writing and maintaining Terraform; provisioning and configuring platform resources across AWS and Azure Diagnosing deployment, networking, endpoint,



and configuration issues Enough depth to reason about deployments and partner with security/networking specialists Collaboration & enablement (about half the day) Standups, syncs, and planning/project meetings Design and architecture reviews; regular PR and code review Onboarding new teams; translating ambiguous requirements into practical plans and challenging weak designs Model deployment support (recurring) Helping teams productionize models‑hosting options, inference patterns, scaling, cost, and operational readiness across Sage Maker, Bedrock, Azure ML/AI Foundry, and Kubernetes Docs & platform improvement (ongoing) Documentation, onboarding guides, and reference examples Ad‑hoc process and platform improvements-spotting and fixing rough edges proactively In short: a builder‑first role with a strong collaborative and enablement component‑someone who moves fluidly between writing code, reviewing work, troubleshooting infrastructure, and guiding architectural decisions.Education & Experience Recommended Four‑year or Graduate Degree in Computer Science, Statistics, Mathematics, Data Science, or any other related discipline or commensurate work experience or demonstrated competence. #J-18808-Ljbffr

📌 Pre-silicon fpga platform engineer — emulation & rtl (Guadalajara)
🏢 Intel..
📍 Guadalajara

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