Micron Technology, Inc. is seeking a DRAM Design Technology Layout Engineer to translate schematics into IP layouts for DRAM chips. You will ensure on-time delivery with quality and collaborate with general teams on layout and verification.
In this role you will apply multiple layout techniques, perform LVS/DRC/EM checks, and support area/time estimations, while guiding peers and contributing to project schedules within a fast-paced semiconductor environment.
J-18808-Ljbffr
📌 DRAM Design Layout Engineer (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque
Postulate a este anuncio
Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.