PDK/CAD Engineer (Tijuana)

PDK/CAD Engineer (Tijuana)

10 sep
|
Qualcomm
|
Tijuana

10 sep

Qualcomm

Tijuana

Company

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

PDK/CAD Engineer - Physical Verification and Extraction Development

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

In this highly cross functional role, you will be part of the General Design Enablement team responsible for the physical verification aspects of PDK development. You will conceptualize, develop, maintain, and improve the Physical Verification flows. The role requires you to work on flow and rule deck development for various technology nodes utilizing the state-of-the-art tools. You will be collaborating with the Custom Digital/Analog/Mixed Signal/RF, Physical design (PD) and Chip integration teams to understand their requirements and challenges and enabling flows to meets their needs.



This role requires a thorough understanding of Design Rule Checks (DRC), Layout Versus Schematic (LVS) and Layout and Programmable ERC, implementing the rules from scratch and/or modify the existing ones.

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field.

Preferred Qualifications

Expertise in Calibre/ICV/Pegasus runset coding for DRC/LVS/ERC/PERC/MPT/ESD/Latch-up/Antenna
Experience with developing and customization of the StarRC/Calibre-xACT/QRC parasitic extraction flows
As a member of the Physical Verification CAD team, you will maintain and improve all aspects of physical verification flow and methodology
Code custom checks such as Layout/Programmable ERCs, addition of custom devices in LVS, implementation of custom design rules (DRCs), etc to meet design team requirements
You will need to have a deep understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, writi

📌 PDK/CAD Engineer (Tijuana)
🏢 Qualcomm
📍 Tijuana

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