Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As a DRAM Engineering Group (DEG) Layout Designer at Micron Technology, Inc., your responsibility includes translating schematics into layout used for the creation of fabrication reticules. The role requires meeting all engineering and process related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution. In this role you will work with Design and engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures.
Responsibilities:
- Design and Verify All Levels of Analog and Digital Layout.
- Use computer aided design software (i.e. Cadence, Calibre, Virtuoso etc.).
- Work with Design Engineers to floorplan and design layout.
- Understand how to solve the layout effects (ANT, LUP, ESD, etc).
- Apply custom and/or automated layout techniques to build pitch, array, and peripheral layout for mixed-signal and electronic circuit builds.
Minimum Qualifications:
- +4 years of experience in Cadence VLE/VXL and Calibre DRC/LVS is a must.
- Bachelor’s degree or equivalent experience on Electrical, Electronics, Mechatronics, Robotics, Biomedical Engineering or similar. It is vital to have some electrical engineering background and most of those programs have them.
- Understand and follow verification protocols
Preferred Qualifications:
- · Interface with design engineering to understand layout methodology.
- · Possess basic