03 sep
|
3050 Micron Semiconductor Mexico, S.de R.L. de
|
Guadalajara
03 sep
3050 Micron Semiconductor Mexico, S.de R.L. de
Guadalajara
3050 Micron Semiconductor Mexico, S.de R.L. de C.V. is seeking a DRAM Design Engineer to transform schematics into layouts for fabrication reticules. Responsibilities include designing IP layouts, verifying layouts for quality, and ensuring timely project delivery.
The idóneo candidate should have a Bachelor's in Electrical or Electronics Engineering and at least 3 years of experience in advanced CMOS layout design. Strong problem-solving skills and proficiency with Cadence tools are essential.
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📌 DRAM Layout Design Engineer – IP Layout & Verification Lead (Guadalajara)
🏢 3050 Micron Semiconductor Mexico, S.de R.L. de
📍 Guadalajara