Responsibilities

- Lead emulation bring-up of CPU RTL on hardware emulation platforms, including design partitioning, clock domain handling, and memory/IO modeling.

- Develop and maintain testbench infrastructure, C/C++ DPI-based transactors, and speed bridges enabling emulation-based execution of firmware, bootloaders, and OS-level workloads.

- Debug complex hardware/software interaction issues surfaced during emulation runs, collaborating with RTL, verification, and software teams to isolate and resolve root causes.

- Build and optimize emulation compile, regression, and debug flows to maximize throughput, turnaround time, and platform utilization.

- Drive emulation capacity planning, resource allocation, and methodology improvements to scale coverage across the design as it matures.

- Collaborate cross-functionally with design, verification, and post-silicon validation teams to define emulation test plans and bridge pre-silicon and post-silicon validation.

Qualifications & Skills

Education:

- Bachelor's (BS) or Master's (MS) degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.

Experience:

- Minimum 6 years of pre-silicon emulation experience with an MS degree or 8 years with a BS degree, including hands‑on work with hardware emulation platforms (e.g., Synopsys ZeBu, Siemens Veloce, Cadence Palladium) on CPU or SoC designs.

- Expertise in SystemVerilog and Python for testbench and transactor development, debugging, and scripting automation.





- Familiarity with ARM, x86, or RISC‑V architectures and assembly language programming.

- Programming experience in industry‑standard languages (e.g., C, C++, Perl, Python).

- Experience with RTL compile/synthesis flows for emulation, design partitioning, and timing/clocking considerations specific to emulation platforms.

- Familiarity with standard SoC interface protocols (e.g., PCIe, DDR, USB, AXI, SPI, I2C) relevant to system‑level bring‑up on emulation.

- Exceptional problem‑solving skills with the ability to debug complex hardware/software issues that only surface at full‑system scale.

- Proficiency with industry‑standard debug and waveform analysis tools (e.g., Verdi, Verisium) for root‑causing emulation failures.

- Strong understanding of microarchitectural concepts and CPU pipeline verification.

- Experience creating reusable test environments and verification infrastructure.

- Familiarity with UVM or similar frameworks and how they interface with emulation environments (nice to have).

- Exposure to OS or firmware bring‑up and boot flows is a plus.

What We Offer

- Competitive salary and benefits package.

- Opportunities for professional growth in an innovative startup environment.

- Collaboration with talented engineers passionate about cutting‑edge CPU technologies.

- A adaptable and inclusive work culture based in Guadalajara, México.

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📌 Staff CPU Emulation Engineer (Puerto Vallarta)
🏢 AheadComputing
📍 Puerto Vallarta