DRAM Layout Engineer Intern: Design, Verify & Innovate (Centro)

DRAM Layout Engineer Intern: Design, Verify & Innovate (Centro)

29 ago
|
Micron Technology
|
Centro

29 ago

Micron Technology

Centro

Micron Technology, Inc is seeking an Intern Senior- Non Mfg. in Jalisco to contribute to analog and digital layout design and verification.
You will work with Cadence tools, collaborate with design engineers on floor plans, and learn verification protocols. Applicants are pursuing a bachelor’s degree related to electrical or electronics engineering with interest in semiconductor memory technologies and Linux scripting.

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📌 DRAM Layout Engineer Intern: Design, Verify & Innovate (Centro)
🏢 Micron Technology
📍 Centro

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