Req ID: JR91540 ENGINEER NCG - HBM LAYOUT Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Minimum Qualifications:
* Bacheloru2019s degree, master or Ph D in Electronics, Mechatronics, Robotics Engineering, Nanotechnology or similar.
* Graduated within the last 2 years from a bacheloru2019s degree, masteru2019s degree, or Ph D program.
* Strong knowledge of electronics circuit concepts.
* Experience using electronic circuits simulation and design tools
* Effective interpersonal and problem-solving abilities.
* English language communication skills (conversational level is a must).
* A self-motivated, enthusiastic team player who enjoys working with others
* Passionate about Technology, willing to learn and develop into the semiconductor field. Preferred Qualifications:
* Participated in internships or school projects related to pre-silicon circuit design.
* Knowledge of Pre-silicon development areas such as analog circuits and physical design.
* Have concepts of CMOS basics, fabrication fundamentals and analog layout basics
* Organized and goal focused thinking.
* Experience with programming and scripting languages such as C++/Phyton
* Used Cadence VLE/VXL, Mentor Graphic Calibre DRC/LVS or similar tools.
* Understand layout effects on the circuit such as speed, capacitance, power and area
* Attitude for attaining problem-solving skills in physical verification of custom layout. Role and Responsibilities
* Responsible for Layout design of leaf cell/Stdcell or sub blocks
* Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design
* Demonstrate commitment towards the work/assignment and plan proactively to finish the work on time.
* Interpret the DRC/LVS/ and other physical verification checks
* Effectively communicating with Internal teams to assure the success of a layout project. Semiconductor Design Engineer 3 Relocation Level: TBD Before Getting Started
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