QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA seeks a talented ASIC/SoC engineer with strong IP modeling, Liberty-based timing and power modeling knowledge.
The role emphasizes front-end Verilog, RTL concepts, and automation across multi-site teams to drive characterization flows and sign-off methodologies.
The candidate should demonstrate robust debugging, programming in Python or Perl, and experience with CMOS/ FinFET concepts, DFT/ QA flows, and EDA tool automation in a
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