For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.

We are looking for Layout Design engineer at our Micron Technology’s DDR Team in Guadalajara, Mexico. As a Layout Design Engineer, you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment.

Responsibilities:

- Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
- Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
- Responsible for on-time delivery of block-level layouts with acceptable quality.




- Effectively communicating with General engineering teams to assure the success of layout project.

Minimum Qualification:

- Bachelor / master's degree in Electronics or related (no more than 2 years of graduated)
- Knowledge of Analog Layout fundamentals (e.g., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
- Ability to understand design constraints and implement high-quality layouts.

Preferred qualifications:

- Excellent command and problem-solving skills in physical verification of custom layout.
- Knowledge in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
- Understanding layout effects on the circuit such as speed, capacitance, power and area etc.

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