19 ago
|
3050 Micron Semiconductor Mexico, S.de R.L. de
|
Jalisco
19 ago
3050 Micron Semiconductor Mexico, S.de R.L. de
Jalisco
Micron Technology in Guadalajara, Mexico is seeking a Layout Design Engineer to work on analog, mixed-signal and full-chip layouts for advanced CMOS processes. You will contribute to high-performance memory designs and collaborate with general teams across multiple projects.
The role requires 5+ years in analog/layout, a BE or MTech in Electronic/VLSI, and proficiency with Cadence VLE/VXL and Calibre DRC/LVS.
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📌 Senior Analog Layout Architect For High-Performance Memory (Jalisco)
🏢 3050 Micron Semiconductor Mexico, S.de R.L. de
📍 Jalisco