Micron Technology in Guadalajara, Mexico is seeking a Layout Build Engineer for its DRAM team. You will work on analog, mixed-signal, and full-chip layout across multiple projects, collaborating with general teams to meet schedules and quality targets.
You should have about 5 years in analog/custom layout in CMOS processes, BE or MTech in Electronic/VLSI, and hands-on Cadence VLE/VXL and Calibre. The role offers challenging opportunities in AI and HPC applications.
📌 Lead Analog/Mixed-Signal Layout Engineer (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque
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