Company:
Engineering Group, Engineering Group ASICS Engineering
General Summary:
Join QCOM Technologies Inc vibrant General CAD team pushing the limits of RTL2GDS solutions for the Snapdragon chips powering billions of mobile devices. The position requires Synthesis or/and Place and Route experience and CAD development skills to define and develop implementation tools and methodologies for PPA, Quality and shortening design cycle time, in close collaboration with Snapdragon Implementation and Physical Design teams. Improving the SoC Synthesis, Formal Verification, Place and Route methodologies for diverse Mobile, Compute, AI, IoT Snapdragon chips.
Support Snapdragon design teams on CAD solutions, analyze their requests, and address their requests through ticket queues.
Interfacing with EDA vendors to enable production-ready tool sets that satisfy project's requirement.




Masters degree or PhD in Computer Engineering, Electrical Engineering, or related field.
~1-4 years of experience in VLSI CAD, preferably Synthesis, Floorplan, Place and Route on SoCs at either top-level or block-level.
~Python and TCL preferred.
Participate to the Synthesis, Place and Route and Formal verification flows enablement for foundry advanced process nodes.
Participate to the tuning of design recipes to address specific objectives such as area, turn-around time on various subsystems such as Modem, GPU, CPU, DDR, Camera, Video, NSP.
Participate to the specification of new CAD solutions addressing the PPA requirements of the design teams.
Bachelor's degree in Science, Engineering, or related field.

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