The Product Development and Test Engineering group develops test solutions for design validation / characterization (NPI) and production (HVM) test platforms for highly integrated ASICS designed by QCT. Job responsibilities for this position include design and debug of test interface hardware, performing required simulations (Power Integrity and Signal Integrity) and release of these solutions into production.
**Preferred Qualifications**
- Master's Degree in Electrical, Electronics Engineering or related fields.
- 2+ years’ experience in HW engineering design and validation
- Knowledge of semiconductor test cell technology and operation and associated hardware design experience
- Familiarity in high-speed digital interfaces and RF with a preference in mmWave, mixed-signal, or analog PCB design including CAD interface.
- Experience in high layer count multilayer boards and sockets/connectors




- Specific experience in designing boards for ATE testers is a plus.
- Good understanding of common signal integrity and power integrity issues on test hardware and ability to identify and provide solutions using simulation tools (eg. PowerSI, SIwave, HFSS, ADS and etc.)
- Able to work with common test equipment (oscilloscope, spectrum analyzer, logic analyzer, network analyzer, etc.), ATE test platforms (Teradyne UFLEX, Advantest 93K) and handlers/probers.
**Minimum Qualifications**
- Bachelor’s Degree in Electrical, Electronics Engineering or related fields.
- Knowledge in PCB design basics and understands board design, debug, and development.
- Ability to communicate technical understandings and project status clearly.

📌 Hardware Engineer (Tijuana)
🏢 North American Production Sharing
📍 Tijuana