12 ago
|
Semiconductor Engineering
|
Sinaloa
12 ago
Semiconductor Engineering
Sinaloa
Semiconductor Engineering seeks a hands-on SoC Design Verification Engineer to drive verification for complex SoC/IP blocks.
You will own verification planning, UVM testbench development, directed and constrained-random test content, coverage closure, and debug across block, subsystem, and SoC levels.You'll collaborate with design, architecture, firmware, and validation teams to deliver high-quality silicon on schedule.
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📌 Soc Verification Engineer: Uvm Testbenches, Coverage Lead (Sinaloa)
🏢 Semiconductor Engineering
📍 Sinaloa