SOC Design Verification Engineer– Pre-Si/Post-Si Verification (Tijuana)

SOC Design Verification Engineer– Pre-Si/Post-Si Verification (Tijuana)

12 ago
|
Qualcomm
|
Tijuana

12 ago

Qualcomm

Tijuana

Company:
QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Job Overview
We are seeking motivated Engineer and Senior Engineer candidates to join our Pre-Silicon and Post-Silicon SoC Verification team. In this role, you will verify next-generation SoCs that power Mobile, AI, high-performance computing, and cloud infrastructure products. The position spans pre-silicon simulation, emulation, acceleration, and post-silicon bring-up/validation activities, with responsibilities aligned to the candidate’s experience level.
Engineer-level candidates will contribute to verification execution, debug, test development, and coverage closure under technical guidance. Senior Engineer-level candidates will additionally lead feature-level verification planning, drive complex debugs across pre-silicon and post-silicon environments, mentor junior engineers, and influence methodology improvements across projects.
Key Responsibilities – Pre-Si and Post-Si Verification:




· Develop and execute verification plans for SoC, subsystem, and IP-level features across pre-silicon and post-silicon phases.
· Build, enhance, and maintain SystemVerilog/UVM, C/C++, processor-based, emulation, and acceleration verification environments.
· Create directed, constrained-random, stress, performance, power, and system-level test scenarios to validate architecture and real-use-case behavior.
· Develop assertions, functional coverage models, checkers, scoreboards, and signoff metrics for verification closure.
· Debug RTL, testbench, emulation, firmware, ATE/vector, and silicon bring-up issues using logs, waveforms, traces, and hardware debug data.
· Support post-silicon validation, silicon characterization, ATE pattern debug, failure triage, and correlation between simulation, emulation, and silicon results.
· Drive coverage closure, regression health, bug tracking, and verification signoff using functional, cod

📌 SOC Design Verification Engineer– Pre-Si/Post-Si Verification (Tijuana)
🏢 Qualcomm
📍 Tijuana

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