Job Title

JR101719 – DRAM Design Tech Layout Engineer

Position Level: Layout/Mask Designer E3 – Relocation Level: TBD

Responsibilities
- Design and develop IP layouts used in DRAM chips.
- Perform layout verification (LVS/DRC/EM), quality check and documentation.
- Deliver block‑level layouts on time with acceptable quality.
- Demonstrate leadership in planning, area/time estimation, scheduling, delegation, and execution to meet project schedules and breakthroughs in a multi‑project environment.
- Guide and lead team members in the execution of sub‑block layouts and review their work.
- Contribute to effective project management.
- Plan and detail layouts, presenting material for global teams to review.
- Collaborate with engineering teams in India, Japan, the US, and other general teams to ensure layout project success.

Minimum Qualifications
- BE/BTech or MTech in Electronic/VLSI Engineering or equivalent; exceptionally talented Diploma holders in electronic or VLSI engineering may also be considered.




- 3+ years of experience in layout design using advanced CMOS processes.
- Experience with IP layout development and physical verification for complex designs as specified.
- Expertise in layout area and routing optimization, design rules, yield, and reliability issues.
- Strong understanding of layout fundamentals: electro‑migration, latch‑up, coupling, crosstalk, IR‑drop, parasitic analysis, matching, shielding, etc.
- Knowledge of schematics and ability to collaborate with circuit designers and CAD teams.
- Understanding of layout effects on circuit performance, capacitance, power, area, etc.
- Excellent problem‑solving skills for area, power, performance, and physical verification of custom layouts.
- Experience with Cadence tools (Virtuoso schematic editor, Virtuoso layout L, XL, and verification tools such as Mentor Calibre); proficiency in device matching, parasitic analysis, electron migration, and isolation techniques.
- Leadership qualities and ability t

📌 DRAM Design Tech Layout Engineer (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque