New College Grad - CMOS & Metallization Test Structure Design and Layout Tlaquepaque, Jalisco, Mexico (San Pedro Tlaquepaque)

New College Grad - CMOS & Metallization Test Structure Design and Layout Tlaquepaque, Jalisco, Mexico (San Pedro Tlaquepaque)

11 ago
|
Micron Memory Malaysia Sdn Bhd
|
San Pedro Tlaquepaque

11 ago

Micron Memory Malaysia Sdn Bhd

San Pedro Tlaquepaque

Req ID: JR96245 New College Grad - CMOS & Metallization Test Structure Design and Layout

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron Technology is a integral leader in memory and storage solutions, transforming how the world uses information to enrich life for all. In this role, you will support process development through memory cell-based test structures, collaborating with multi-functional teams to ensure accurate design, validation, and silicon health monitoring. This position offers the opportunity to work on advanced semiconductor technologies and contribute to innovative solutions in a fast-paced environment.

Responsibilities





- Support process development by creating and implementing memory cell-based test structure solutions in collaboration with cross-functional teams.
- Interpret DUT (Device under Test) definitions and develop complete, high-confidence TEGs (Test Element Groups) for silicon validation.
- Implement innovative solutions to analyze failure mechanisms and monitor silicon performance and health.
- Perform parametric correlation, debug activities, and validate design accuracy.
- Verify and maintain test structure documentation and associated parametric data.

Minimum Qualifications

- Master’s degree in Electrical, Computer, or Microelectronic Engineering (graduated within the last 2 years).
- Hands-on experience with EDA tools such as Cadence Virtuoso and Calibre.
- Strong knowledge of circuit build, layout, schematic development, and verification (DRC, LVS, HSPICE).
- Understanding of semiconductor device physics, parametric testing, and DFM or equivalent ex

📌 New College Grad - CMOS & Metallization Test Structure Design and Layout Tlaquepaque, Jalisco, Mexico (San Pedro Tlaquepaque)
🏢 Micron Memory Malaysia Sdn Bhd
📍 San Pedro Tlaquepaque

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