**Our vision is to transform how the world uses information to enrich life for**_all _**.
**
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
The Senior/Principal Guadalajara CAD Memory Engineer is a technical role within the Engineering Automation (EA) organization at Micron.
The EA organization delivers DTK (Design Technology Kit) collateral, environments, tools and flows for the design, implementation, verification, and tape out of custom memory designs.
These CAD tools and collateral enable DRAM, NAND, and other emerging memory designs on a range of industry-leading Micron-developed process nodes.
**Responsibilities**:
- Perform day-to-day support of CAD tools, flows and collateral provided by functionally organized CAD teams worldwide to DRAM design teams at the Guadalajara DEG Design Center.
The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification (LVS, DRC), ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis (including HCI, BTI, EM/IR), tape out and mask generation.
- Drive close collaboration with DRAM design, layout, and verification methodology teams to propose and co-develop capabilities outstanding or under supported by EDA vendors and deploy best in class practices and methodologies consistently to DRAM designs worldwide.




**Qualifications**:
- Bachelor or preferably Masters/PhD in Computer Engineering, Computer Science or Electrical Engineering
- ******) + years of direct CAD or Design experience in mixed-signal, custom IC design flows
- Experience working in highly technical IC Design or CAD teams distributed worldwide
- Familiarity with memory design preferred (DDR3/4/5, LP3/4/5, HBM, NAND)
- Knowledge of CMOS circuit design, layout and verification, and in-depth experience supporting some of these areas: CMOS transistor level design, logical design and netlisting, CMOS digital and analog layout, Cadence Skill and parameterized cells, Automated place and route tools, LVS, DRC, LPE flows, ERC flows, static and dynamic circuit checks, Circuit simulation including nanometer scale MOS and interconnect effects, Digital simulation and verification flows (System Verilog/UVM test benches and coverage systems), Power delivery network simulation and analysis, Reliability flows such as HCI, BTI, EM/IR, crosstalk, Mask generation and tape out basics.
**Preferred Qualifications**:
- Experience qualifying vendor tools and internally developed software releases.
- Experience developing software prototypes for innovative ideas in IC design, layout, and analysis.
- Experience running agile (software) sprints is a plus.
"The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position."
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

📌 Senior/Principal Engineer, Memory Cad, Guadalajara (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque