**Company**:QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA
**Job Area**:Engineering Group, Engineering Group > ASICS Engineering
**General Summary**:
**Minimum Qualifications**:
- Bachelor's degree in Science, Engineering, or related field.
**Responsibilities**:
- Collaborate with design team and work with cross functional teams.
- Use good verbal and written communication skills to describe daily technical and non-technical issues
- Take responsibility for your own work and making decisions
- Exercise creativity to troubleshoot technical problems
**Requirements**:
- Bachelor's Degree or higher in Electrical Engineering, Computer Engineering, or related fields.
- One years experience in physical design engineering
- Successful Tapeouts in Nanometer Technologies
- Understanding of complex foundry design rules and requirements
- In-depth knowledge of design flow RTL to GDS process
- Floor-planning
- Automatic and custom placement
- Multi-voltage power domains
- Pre-placement and pre-routing
- Power Design Networks PDN-planning
- Place & Route
- Clock Tree Synthesis and customization
- Static Timing Analysis
- Understand Timing constraints
- Fixing timing violations
- Physical Verification
- DRC, LVS, ERC, DFM
- Virtuoso is a plus
- Experience with industry leading tools
- Cadence
- Synopsys
- Mentor
- Ansys
- Working knowledge of programming languages, HDL, OS
- Python, C++, TCL, Perl, Awk
- Verilog/VHDL,Unix/Linux
- Excellent written and verbal communication.
- Automation with Perl, Python and tcl is plus
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
If you would like more information about this role, please contact Qualcomm Careers.