This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market.
Its silicon engineering drives solutions that deliver high performance, energy efficiency, and intelligent integration, complemented by a key role in advancing modern telecommunications through next-generation wireless connectivity technologies.
Its solutions are integrated into billions of devices worldwide, offering an idóneo professional environment for talent seeking technological impact, innovation, and growth within a global context.
Job Overview: Design adaptive power management controller, on-chip sensor controller, and digital power meter.
Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks.




Work closely with technology/circuit design team to close IP block specification/requirement.
Work closely with verification/physical design team to complete the IP design implementation.
Support SoC team to integrate low power/power management IP solution into wireless SoC chips and front-end design flows.
Work closely with system/software/test team to enable the low power feature in wireless SoC product.
Work closely with system/software/test team to enable functional safety feature in automotive SoC product.
Create/Enhance low power methodologies covering entire design cycle from RTL to GDS.
Analyze how a new methodology will affect different phases of the design/verification cycle and work on fixing any issues.
Provide feedback for low-power chip and system architecture.
Understand and perform block

📌 Low Power Design Engineer (Tijuana)
🏢 North American Production Sharing
📍 Tijuana