Company

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area

Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary

We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool know-how and hands‑on experience and automation skills. Hands‑on experience in EDA tool automation, data analysis and visualization & large-scale software automation enablement. Excellent understanding of statistical Liberty timing, power model and Front-end Verilog views and tools. Silicon reliability modeling, validation with multiple foundries & EDA house is a plus.Required for this Role

Strong Std cell / Memory circuit knowledge & IP characterization, Design Kit delivery background.Strong logical and problem-solving skills with excellent analytical and debugging skillsStrong Software programming skills in Python or Perl in UNIX/Linux computing platformHighly motivated, excellent team spirit and good communication skills.Ability to work in multi-site project teams, third party vendors to drive cutting edge tools, flows in QCOM environment for characterization flow and sign-off methodologiesPreferred Qualifications

In depth technical knowledge of CMOS, FinFET logic and transistor, basic of digital circuit design optimizationFamiliar with industry standard Design kit (DK) views, Liberty formats for foundation IPs (advanced modeling formats CCS, LVF) , statistical variation models & worked on development of the same.Familiarity with front end pre-silicon design flow, RTL design/coding, logic design, Verilog/ System Verilog, RTL design verification, System Verilog Assertion (SVA), Design for Test, BIST modeling experience.Expertise in scripting in Python (data-analytics), Perl & experience in developing large scale automation from scratch.Experience in STA,



physical design is a plus.Experience of spice simulation models, design rules verification procedures (like DRC/LVS/ERC) is a plus.The idóneo candidate would also have experience with industry standard chip design tools and design flows for Static Timing Analysis, Spice / Fast spice simulation, Synthesis, DFT, Power AnalysisEducation Qualifications

Required: Bachelors, Electrical Engineering or Computer Engineering or Computer SciencePreferred: Master's, Electrical Engineering or Computer Engineering or Computer ScienceWork Experiences

0 - 3 years Library characterization or Custom circuit design or CAD flow development or VLSI related work experience.Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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📌 Tech IP Library Characterization Engineer (Ciudad de México)
🏢 Qualcomm
📍 Ciudad de México