Micron Technology in Mexico is seeking an entry-level IC layout engineer to contribute to leaf cell and Stdcell layout projects. This role requires meticulous attention to design rules, strong collaboration with cross-functional teams, and a proactive approach to problem-solving.
You will interpret DRC/LVS checks, support layout verification, and help ensure high-quality silicon implementations across pre-silicon activities and design flows. Fluency in English is preferred for collaboration.
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📌 IC Layout Engineer — Pre-Silicon Design & AI Automation (San Pedro Tlaquepaque)
🏢 Micron Technology
📍 San Pedro Tlaquepaque
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