04 ago
|
Semiconductor Engineering
|
Puerto Vallarta
04 ago
Semiconductor Engineering
Puerto Vallarta
Semiconductor Engineering is seeking a hands-on SoC Design Verification Engineer to drive verification for complex SoC/IP blocks. You will own verification planning, UVM testbench development, test content creation (directed and constrained-random), coverage closure, and debug across block, subsystem, and SoC levels. You will collaborate with design, architecture, firmware, and validation teams to deliver high-quality silicon on schedule, ensuring robust verification strategies and timely
📌 Senior SoC Verification Engineer — UVM, Coverage & Debug (Puerto Vallarta)
🏢 Semiconductor Engineering
📍 Puerto Vallarta