02 ago
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Intel..
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Jalisco
Intel in Mexico is seeking a hands-on SoC Design Verification Engineer to drive verification for complex IP blocks and SoC features.You will own planning, UVM testbenches, constrained-random testing, coverage closure, and debug across levels, collaborating with design, architecture, firmware, and validation teams to deliver silicon on schedule.Minimum qualifications include a bachelor's in Electrical or Computer Engineering and 5+ years in SoC/IP verification, with strong UVM/SystemVerilog,#J-*****-Ljbffr
📌 Senior Soc Verification Engineer: Uvm, Coverage & Debug (Jalisco)
🏢 Intel..
📍 Jalisco