**Key Responsibilities**:
- Design, develop, and optimize validation tests for multi-processor systems with a focus on system level concurrency.
- Develop and maintain bare-metal software, including low-level hardware interfaces, register and interrupt programming, and clock and power management.
- Collaborate with hardware and software teams to define and validate system level software use cases.
- Debug and troubleshoot System-On-Chip with limited visibility, using development boards and lab equipment.
- Implement and optimize algorithms for performance, power efficiency, and memory footprint.
- Support pre-silicon validation efforts, working with simulation, emulation, and FPGAs.
- Conduct post-silicon bring-up, validation, system level use cases, and system integration.
**Required Qualifications**:
- Strong understanding of operating systems concepts, caching, virtual memory, and embedded software fundamentals.




- Experience with bare-metal software development and low-level hardware interfaces.
- Excellent problem-solving skills and the ability to work in a dynamic, collaborative environment.
- Experience programming in C, Assembly language.
- Some exposure to scripting language (Python, Linux shell, etc.).
**Preferred Qualifications**:
- Familiarity in reading and understand the RTL code (e.g. Verilog, VHDL) and use the knowledge in the context of silicon validation.
**Minimum Qualifications**:
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

📌 Validation Engineer (Tijuana)
🏢 North American Production Sharing
📍 Tijuana