Soc Synthesis Engineer: Optimize Ppa For High-Perf Asic (Tijuana)

Soc Synthesis Engineer: Optimize Ppa For High-Perf Asic (Tijuana)

31 jul
|
Nutanix
|
Tijuana

31 jul

Nutanix

Tijuana

Qualcomm is seeking a SoC Design & Synthesis Engineer in Baja California to synthesize RTL into gate-level netlists, ensuring timing, power, and DFT readiness before PD handoff.
You will work with Design, DFT, and Physical Design teams to optimize PPA and support post-change validation across Snapdragon platforms.The role requires hands-on experience with large-scale SoC synthesis, functional ECOs, and debugging under tight schedules.
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📌 Soc Synthesis Engineer: Optimize Ppa For High-Perf Asic (Tijuana)
🏢 Nutanix
📍 Tijuana

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