[WQU030] Validation Engineer

[WQU030] Validation Engineer

19 feb
|
UST Global
|
San Francisco del Rincón

19 feb

UST Global

San Francisco del Rincón

Job Description



Expertise in test methodology for CMOS SoC s. Prefer candidates with strong digital, analog, and MXS test programing and debug experience. Familiar testing IP blocks such as PLL, efuse, LDO s, PCIe Serdes , DDR, and ONFI.

Excellent programming skills for writing and debugging ATE test programs and test related hardware development. Expertise with Teradyne UFlex platforms, Handler, and Wafer Sort Probers.

Expertise in test strategies development, test plans definition, DFT Patterns implementation ATPG SCAN, TDF, MemBIST and repair, BSACAN, JTAG and Functional Patterns.

Expertise in ATE architecture and Test Hardware FT WS Design and Debugging, Schematic Capture and PCB layout.



ATE Test Vectors conversion tools like VTAN and very competent in debugging issue during development phase or in high volume production.

Competency in programming with high level languages i.e., C C or Visual Basic. and Scripting languages i.e., PERL .

Knowledge of proper and effective use of lab test equipment. i.e., oscilloscope, logic analyzer, etc.

Experience with Data Analysis SW in support of Characterization Reports and Yield Reporting tools such as Excel VBA, JMP, Galaxy, or Data Conductor

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